Large-signal charge control modeling of photoreceivers for applications up to 40 Gb/s

A charge control model was used to simulate the sensitivity and responsivity in a range of photodetector configurations including heterojunction bipolar phototransistors (HPTs), PIN-HBT, and APDs. Our simulations enabled for the first time a direct comparison of the performance between these photodetectors to be made. Simulations have been performed at bit rates from 2 to 40 Gb/s using various combinations of device design parameters (layer thickness, source resistance, and dc base voltage). For a BER = 10(-9) at 40 Gb/s the best sensitivity of approximately -20 dBm was achieved using an optimized APD-HBT configuration, followed by sensitivities of approximately -14 dBm using optimized PIN-HBTs and HPTs. These results were found to agree well with published experimental data

Temperature dependence of breakdown and avalanche multiplication in In0.53Ga0.47As diodes and heterojunction bipolar transistors

The avalanche multiplication and impact ionization coefficients in In/sub 0.53/Ga/sub 0.47/As p-i-n and n-i-p diodes over a range of temperature from 20-400 K were measured and shown to have negative temperature dependence. This is contrary to the positive temperature dependence of the breakdown voltage measured on InP/In/sub 0.53/Ga/sub 0.47/As heterojunction bipolar transistors (HBTs) in this and previous works. It is shown that the collector-base dark current and current gain can be the overriding influence on the temperature dependence of breakdown in InP/In/sub 0.53/Ga/sub 0.47/As HBTs and could explain previous anomalous interpretations from the latter

Sulfuric acid and hydrogen peroxide surface passivation effects on AlGaN/GaN high electron mobility transistors

In this work, we have compared SiNx passivation, hydrogen peroxide, and sulfuric acid treatment on AlGaN/GaN HEMTs surface after full device fabrication on Si substrate. Both the chemical treatments resulted in the suppression of device pinch-off gate leakage current below 1 μA/mm, which is much lower than that for SiNx passivation. The greatest suppression over the range of devices is observed with the sulfuric acid treatment. The device on/off current ratio is improved (from 104–105 to 107) and a reduction in the device sub-threshold (S.S.) slope (from ∼215 to 90 mV/decade) is achieved. The sulfuric acid is believed to work by oxidizing the surface which has a strong passivating effect on the gate leakage current. The interface trap charge density (Dit ) is reduced (from 4.86 to 0.90 × 1012 cm−2 eV−1), calculated from the change in the device S.S. The gate surface leakage current mechanism is explained by combined Mott hopping conduction and Poole Frenkel models for both untreated and sulfuric acid treated devices. Combining the sulfuric acid treatment underneath the gate with the SiNx passivation after full device fabrication results in the reduction of Dit and improves the surface related current collapse

Analysis of gain variation with changing supply voltages in GaN HEMTs for envelope tracking power amplifiers

Envelope tracking (ET) is a promising power amplifier (PA) architecture for current and future communications systems, which uses dynamic modulation of the supply voltage to provide high efficiency and potentially very wide bandwidth over a large dynamic range of output power. However, the dynamic nature of the supply voltage can lead to a problematic variation in transistor gain, particularly in GaN HEMTs. This paper describes and analyzes this behavior and the detrimental effect it can have on ET PAs. Contributing factors and origins of gain variation are described in detail along with how, for the first time, meaningful comparisons can be made between different devices. Using these guidelines, gain variation is shown to be a widespread issue effecting most GaN HEMTs presented in literature. To allow an analysis of the intrinsic device behavior, an extended transistor model is developed that takes the effect of gate and source field plates into account. This model is refined using measurement data and used to demonstrate the fact that the parasitic gate–drain capacitance ( $C_{\textrm {GD}}$ ) is the main contributor to the small-signal gain variation—a significant part of the overall gain variation. Based on this knowledge, possible strategies to reduce gain variation at the transistor technology level are proposed, allowing the optimization of GaN HEMTs specifically for ET PAs. One identified strategy involves reducing the length of the gate field plate and is shown to be a viable approach to reduce the gain variation in GaN HEMTs, albeit at an increased RF/dc dispersion

A 624 V 5 A all‐GaN integrated cascode for power‐switching applications

An all‐GaN integrated cascode device with an output current of 5 A, threshold voltage of +0.65 V and breakdown voltage of 624 V is demonstrated. Compared with the commercial 600 V hybrid GaN plus Si cascode device (TPH3202), the integrated cascode exhibits a significantly reduced delay time when switched at 200 V and 2.7 A. This is attributed to the absence of a Si metal–oxide–semiconductor field‐effect transistor (MOSFET) driver, leading to a much smaller input capacitance as indicated by the high voltage capacitance measurements. In addition, the integrated cascode device shows a reduced ringing effect due to monolithic integration. When compared with commercial 600 V standalone GaN devices (GS66502B and GS‐065‐004), a reduced Miller effect is observed for the integrated cascode when switched under low gate‐driving current conditions. The results demonstrate the advantages of the cascode device to switch with low gate‐driving current using cheaper, faster, and more efficient gate drivers

Field plate designs in all-GaN cascode heterojunction field-effect transistors

Different source field plate (FP) connections are compared for the all-GaN integrated cascode device to address the capacitance matching and turn-off controllability issues reported in the conventional GaN plus Si cascode. The experimental results suggest that the cascode device with an FP connected to the source terminal can significantly suppress the off-state internode voltage, leading to minimized capacitive energy loss and reduced overvoltage stress at the internode. This is attributed to the reduced ratio of the drain-source capacitance of the depletion mode cascode part to the total capacitance at the cascode internode. An additional FP on the E-mode cascode part is proposed to further suppress the off-state internode voltage and benefit the device. Cascode devices with the source FP connecting to the enhancement mode gate have an improved switching controllability via gate resistance during turn-off and hence enhanced dv/dt immunity in the drain loop

Effects of surface plasma treatment on threshold voltage hysteresis and instability in metal-insulator-semiconductor (MIS) AlGaN/GaN heterostructure HEMTs

In a bid to understand the commonly observed hysteresis in the threshold voltage (VTH) in AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors during forward gate bias stress, we have analyzed a series of measurements on devices with no surface treatment and with two different plasma treatments before the in-situ Al2O3 deposition. The observed changes between samples were quasi-equilibrium VTH, forward bias related VTH hysteresis, and electrical response to reverse bias stress. To explain these effects, a disorder induced gap state model, combined with a discrete level donor, at the dielectric/semiconductor interface was employed. Technology Computer-Aided Design modeling demonstrated the possible differences in the interface state distributions that could give a consistent explanation for the observations

Active Amplification of the Terrestrial Albedo to Mitigate Climate Change: An Exploratory Study

This study explores the potential to enhance the reflectance of solar insolation by the human settlement and grassland components of the Earth's terrestrial surface as a climate change mitigation measure. Preliminary estimates derived using a static radiative transfer model indicate that such efforts could amplify the planetary albedo enough to offset the current global annual average level of radiative forcing caused by anthropogenic greenhouse gases by as much as 30 percent or 0.76 W/m2. Terrestrial albedo amplification may thus extend, by about 25 years, the time available to advance the development and use of low-emission energy conversion technologies which ultimately remain essential to mitigate long-term climate change. However, additional study is needed to confirm the estimates reported here and to assess the economic and environmental impacts of active land-surface albedo amplification as a climate change mitigation measure.Comment: 21 pages, 3 figures. In press with Mitigation and Adaptation Strategies for Global Change, Springer, N

Search for Tensor, Vector, and Scalar Polarizations in the Stochastic Gravitational-Wave Background

The detection of gravitational waves with Advanced LIGO and Advanced Virgo has enabled novel tests of general relativity, including direct study of the polarization of gravitational waves. While general relativity allows for only two tensor gravitational-wave polarizations, general metric theories can additionally predict two vector and two scalar polarizations. The polarization of gravitational waves is encoded in the spectral shape of the stochastic gravitational-wave background, formed by the superposition of cosmological and individually unresolved astrophysical sources. Using data recorded by Advanced LIGO during its first observing run, we search for a stochastic background of generically polarized gravitational waves. We find no evidence for a background of any polarization, and place the first direct bounds on the contributions of vector and scalar polarizations to the stochastic background. Under log-uniform priors for the energy in each polarization, we limit the energy densities of tensor, vector, and scalar modes at 95% credibility to Ω0T<5.58×10-8, Ω0V<6.35×10-8, and Ω0S<1.08×10-7 at a reference frequency f0=25 Hz. © 2018 American Physical Society